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Su ZHENG (鄭溯)Ph.D. Student
Department of Computer Science and Engineering
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Biography
I am a second-year Ph.D. Student at the Department of Computer Science and Engineering, the Chinese University of Hong Kong (CUHK),
under the supervision of Prof. Bei YU and Prof. Martin D.F. Wong since Fall 2022. Prior to that, I obtained my B.Eng. and M.S. degree from Fudan University under the supervision of Prof. Lingli Wang in 2015-2022.
My research interest is to solve critical problems in electronic design automation (EDA) with advanced artificial intelligence (AI) methods. Besides research, I love playing the piano and listening to classical music in my spare time.
Recent News
Sep/2023: Congratulation! Our work on computational lithography dataset has been accepted by NeurIPS 2023 Datasets and Benchmarks!
Sep/2023: Congratulation! Our work on ILT has been accepted by TCAD!
Sep/2023: Congratulation! Our work on DNN-targeting SoC design has been accepted by ASP-DAC!
Aug/2023: Congratulation! Our invited paper about OpenILT has been accepted by ASICON!
Jul/2023: Congratulation! Our work on deep-leaning-based congestion prediction has been accepted by ICCAD!
Mar/2023: OpenILT released! Our open-source inverse lithography technology (ILT) platform is available at OpenILT!
Feb/2023: Congratulation! Our work on large-scale design space exploration has been accepted by TODAES!
Feb/2023: Congratulation! Our work on deep-learning-assisted global placement has been accepted by DAC 2023!
Research Interest
AI in Electronic Design Automation
Optical Proximity Correction
VLSI Placement
Design Space Exploration
Coarse Grained Reconfigurable Arrays
Approximate Computing
Publication
[C9] S. Zheng, H. Yang, B. Zhu, B. Yu, M. D.F. Wong, “LithoBench: Benchmarking AI Computational Lithography for Semiconductor Manufacturing”, Neural Information Processing Systems (NeurIPS) Datasets and Benchmarks Track, 2023
[J3] B. Zhu, S. Zheng, Z. Yu, G. Chen, Y. Ma, F. Yang, B. Yu, M. D.F. Wong, “L2O-ILT: Learning to Optimize Inverse Lithography Techniques”, accepted by IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems (TCAD).
[C8] S. Chen, S. Zheng, C. Bai, W. Zhao, S. Yin, Y. Bai, B. Yu, “SoC-Tuner: An Importance-guided Exploration Framework for DNN-targeting SoC Design”, IEEE/ACM Asian and South Pacific Design Automation Conference (ASP-DAC), 2023
[C7] S. Zheng, B. Yu, M. D.F. Wong, “OpenILT: An Open Source Inverse Lithography Technique Framework”, International Conference on ASIC (ASICON), 2023 (Invited Paper)
[C6] S. Zheng, L. Zou, P.Xu, S. Liu, B. Yu, M. D.F. Wong, “Lay-Net: Grafting Netlist Knowledge on Layout-Based Congestion Prediction”, International Conference on Computer-Aided Design (ICCAD), 2023
[J2] S. Zheng, H. Geng, C. Bai, B. Yu, and M. Wong, Boosting vlsi design flow parameter tuning with random embedding and multi-objective trust-region bayesian optimization. ACM Transactions on Design Automation of Electronic Systems (TODAES), 2023
[C5] S. Zheng, L. Zou, S. Liu, Y. Lin, B. Yu, M. D.F. Wong, “Mitigating Distribution Shift for Congestion Optimization in Global Placement”, Design Automation Conference (DAC), 2023
[C4] S. Zheng, J. Qian, H. Zhou, L. Wang, “GRAEBO: FPGA General Routing Architecture Exploration via Bayesian Optimization,” The International Conference on Field-Programmable Logic and Applications (FPL), 2022.
[J1] Z. Li, S. Zheng, J. Zhang, Y. Lu, J. Gao, J. Tao, L. Wang, “Adaptable Approximate Multiplier Design Based on Input Distribution and Polarity,” in IEEE Transactions on Very Large Scale Integration (VLSI) Systems, vol. 30, no. 12, pp. 1813-1826, Dec. 2022.
[C3] S. Zheng, Z. Li, Y. Lu, J. Gao, J. Zhang and L. Wang, “HEAM: High-Efficiency Approximate Multiplier optimization for Deep Neural Networks,” 2022 IEEE International Symposium on Circuits and Systems (ISCAS), 2022. (code)
[C2] S. Zheng, K. Zhang, Y. Tian, W. Yin, L. Wang and X. Zhou, “FastCGRA: A Modeling, Evaluation, and Exploration Platform for Large-Scale Coarse-Grained Reconfigurable Arrays,” International Conference on Field-Programmable Technology (ICFPT), 2021.
[C1] S. Zheng, J. Chen and L. Wang, “Targeted Black-Box Adversarial Attack Method for Image Classification Models,” 2019 International Joint Conference on Neural Networks (IJCNN), 2019. (code)
Education
Ph.D., Department of Computer Science and Engineering, The Chinese University of Hong Kong (CUHK), Aug/2022 - Now
M.S., State Key Laboratory of ASIC & System, Fudan University (FDU), Sep/2019 - Jun/2022
B.Eng. (Elite Engineering Honor Degree, Rank 1st), School of Microelectronics, Fudan University (FDU), Sep/2015 - Jun/2019
Projects
OpenILT, an open-source inverse lithography technology platform.
FastCGRA, a platform for large-scale CGRA, 40k+ lines of C++ code, also named HierCGRA. Thanks for Chang's efforts!
SimpleCGRA, a simple and efficient CGRA platform, implemented with Python and LLVM.
ApproxFlow, an approximate multiplier design and evaluation platform for deep learning, 10k+ lines of C++ code.
Black-box-attack, a targeted black-box adversarial attack method for image classification models.
Selected Awards
| Third Place (4/25), | EDAthon 2023 | 2023 |
| Full Postgraduate Studentship, | The Chinese University of Hong Kong, | 2022-2026 |
| First Class Scholarship, | Fudan University, | 2015-2018 |
Skills
Languages: C/C++, Python, Verilog, Perl, Haskell, Matlab, R, Java
Tools : PyTorch, Tensorflow, Caffe, Vivado, LaTeX
Hobbies : Piano, Classical Music